Interactive Logic Circuits
AND GATE
A
B
AND
0
Y
Truth Table
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
OR GATE
A
B
OR
0
Y
Truth Table
| A | B | Y |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 1 |
NOT GATE
A
1
1
Y
Truth Table
| A | Y |
|---|---|
| 0 | 1 |
| 1 | 0 |
NAND GATE
A
B
&
1
Y
Truth Table
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
NOR GATE
A
B
≥1
1
Y
Truth Table
| A | B | Y |
|---|---|---|
| 0 | 0 | 1 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 0 |
RS FLIP-FLOP (NOR Latch)
R
S
≥1
≥1
0
Q
1
Q
State Transition Table
| S | R | Q(next) | Q(next) |
|---|---|---|---|
| 0 | 0 | Hold (Q) | Hold (Q) |
| 0 | 1 | 0 (Reset) | 1 |
| 1 | 0 | 1 (Set) | 0 |
| 1 | 1 | 0 (Invalid) | 0 |